With widespread use of an information terminal, there has been a growing need for a flat panel display as a computer display. As the information-oriented society advances, the information having been provided in the form of paper media so far is more often provided as digital information. Thus, there has been an increasing need for electronic paper or digital paper as a thin, light and easily portable mobile display medium.
In a flat panel display apparatus, the display medium is commonly made up of devices based on liquid crystal, organic electroluminescence and electrophoresis. To ensure uniform screen brightness and screen rewriting speed, such a display medium mainly uses the technology wherein an active drive device made up of a thin film transistor (TFT) is used as an image drive device.
To produce a TFT device, a semiconductor thin film such as an a-Si (amorphous silicon) and p-Si (polysilicon), and a metal thin film such as a source, a drain and a gate electrode are sequentially formed on a glass substrate in general cases. Manufacturing of a flat panel display based on the TFT usually requires a high-precision photolithography step, in addition to the thin film forming step that needs such vacuum-based equipment as a CVD and sputtering device and high-temperature processing steps. This requires high running costs and high equipment costs. Further, to meet the requirements for larger display screens in recent years, the costs have been expanded immensely.
In recent years, there is a very active effort going on in the research and development projects for an organic TFT device using the organic semiconductor material as a technology to make up for the demerits of the conventional TFT device (Japanese Laid-Open Patent Publication No. H10-190001 and Journal of Advanced Material Vol. 2, 2002, P. 99 (Review)). This organic TFT device can be produced in a low-temperature process, and permits use of a crack-resistant resin substrate of light weight. Further, this device is claimed as providing a flexible display using a resin film as a support member (SID '02 Digest P. 57). Further, a very low-cost display with excellent productivity may be achieved by using the organic semiconductor material that can be manufactured in a wet process of printing and coating under atmospheric pressure.
A technique has been disclosed to manufacture an organic TFT using an inkjet for electrode formation (e.g., Brochure for International Publication No. 01/47043). This technique allows use of a process that does not employ a vacuum system. However, a polyimide film formed according to the photolithography method is still used in the channel area between the source and drain electrode.
The technique disclosed in the Brochure for International Publication No. 01/47043 is based on photolithography, and requires a complicated process and higher production costs. Further, accuracy in channel formation depends on the accuracy in photolithography and inkjet exposure positioning. This raises a problem of increasing variations in performances among devices. Further, at the time of forming the source electrode and the drain electrode, a liquid material is emitted. This tends to cause short circuiting. When short circuiting has occurred, a non-defective device cannot be produced.
To improve the channel formation accuracy, a method has been proposed for forming a channel wherein the unwanted portion of the semiconductor layer is sublimed and removed by application of ultraviolet rays (e.g., Japanese Laid-Open Patent Publication No. 2005-175157).
The method disclosed in the Japanese Laid-Open Patent Publication No. 2005-175157, however, requires mask alignment for semiconductor formation. This method improves the accuracy of the channel configuration, but is insufficient relative positioning.
A method has been proposed for high-accuracy layout of self-assembled monolayers on the gate electrode projection area of the surface of the insulation film on an selective basis, wherein the orientation order of the organic semiconductor film is improved on only inside the gate electrode projection area on an selective basis, not improved on the light-exposed area outside the gate electrode projection area (e.g., Japanese Laid-Open Patent Publication No. 2005-79560).
The method disclosed in the Japanese Laid-Open Patent Publication No. 2005-79560, however, permits channel formation without using the method of photolithography. It provides only the patterning of the orientation control capability of the self assembled monolayer, and the active portion of the semiconductor cannot be strictly patterned.
As described above, the method disclosed in the Japanese Laid-Open Patent Publication No. 2005-79560 provides only the patterning of the orientation control capability of the self assembled monolayer, without patterning of the semiconductor layer per se. This arrangement tends to produce greater variations in performances among thin film transistors.